Invention Grant
- Patent Title: Manufacturing method of semiconductor device and semiconductor device
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Application No.: US15900416Application Date: 2018-02-20
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Publication No.: US10403513B2Publication Date: 2019-09-03
- Inventor: Shoji Hashizume , Keita Takada
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McGinn IP Law Group, PLLC.
- Priority: JP2017-054230 20170321
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L23/495 ; H01L21/48 ; H01L23/544 ; B29C45/14 ; B29C45/00 ; H01L23/31 ; B29L31/34 ; H02P27/06
Abstract:
In a manufacturing method of a semiconductor device, by arranging a lead in the vicinity of a gate portion serving as a resin injection port of a mold, a void is prevented from remaining within an encapsulation body when two semiconductor chips arranged so as to overlap in the Y direction are encapsulated with resin. Further, a length of an inner lead portion of the lead in the Y direction is greater than a length of an inner lead portion of another lead overlapping a chip mounting portion in the Y direction.
Public/Granted literature
- US20180277397A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE Public/Granted day:2018-09-27
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