A memory device includes a plurality of word lines elongated along a first direction, and at least one memory unit. The at least one memory unit includes a plurality of memory cells, at least one bit line, and at least one column word line. The plurality of memory cells are arranged along a second direction different from the first direction. The at least one bit line is elongated along the second direction, and configured to transmit data of a selected memory cell. The at least one column word line is elongated along the second direction, and configured to control electrical connections between the memory cells and the at least one bit line, wherein the selected memory cell is selected by a corresponding word line and the at least one column word line.