Invention Grant
- Patent Title: Reference voltage circuit and semiconductor device
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Application No.: US16227740Application Date: 2018-12-20
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Publication No.: US10401891B2Publication Date: 2019-09-03
- Inventor: Kaoru Sakaguchi
- Applicant: ABLIC Inc.
- Applicant Address: JP Chiba-shi, Chiba
- Assignee: Ablic Inc.
- Current Assignee: Ablic Inc.
- Current Assignee Address: JP Chiba-shi, Chiba
- Agency: Brinks Gilson & Lione
- Priority: JP2018-020911 20180208
- Main IPC: G05F3/24
- IPC: G05F3/24 ; G05F3/26 ; H01L27/06 ; H01L27/088

Abstract:
A reference voltage circuit includes: a depletion type MOS transistor and an enhancement type MOS transistor connected in series, and having gates thereof connected in common, the enhancement type MOS transistor providing a reference voltage from a drain thereof, the depletion type MOS transistor including at least a first depletion type MOS transistor and a second depletion type MOS transistor connected in series; and a capacitor having one end connected to a drain of the first depletion type MOS transistor, and the other end connected to a source of the first depletion type MOS transistor.
Public/Granted literature
- US20190243406A1 REFERENCE VOLTAGE CIRCUIT AND SEMICONDUCTOR DEVICE Public/Granted day:2019-08-08
Information query
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