Invention Grant
- Patent Title: System and fabrication method of piezoelectric stack that reduces driving voltage and clamping effect
-
Application No.: US15308819Application Date: 2015-05-06
-
Publication No.: US10381544B2Publication Date: 2019-08-13
- Inventor: Pengdi Han , Jian Tian , Stephen Dynan , Brandon Stone
- Applicant: CTG Advanced Materials, LLC
- Applicant Address: US IL Lisle
- Assignee: CTS Corporation
- Current Assignee: CTS Corporation
- Current Assignee Address: US IL Lisle
- Agent Daniel Deneufbourg
- International Application: PCT/US2015/029414 WO 20150506
- International Announcement: WO2015/171726 WO 20151112
- Main IPC: C30B11/00
- IPC: C30B11/00 ; C30B11/08 ; C30B29/22 ; C30B35/00 ; H01L41/18 ; H01L41/083 ; H01L41/277

Abstract:
A system and method provides a piezoelectric stack arrangement for reduced driving voltage while maintaining a driving level for active piezoelectric materials. A stack arrangement of d36 shear mode single crystals of both air X-cut and Y-cut ±1:45° (±20°) arrangement are bonded with discrete conductive pillars to form a shear crystal stack. The bonding area between the neighboring crystal parts is minimized. The bonding pillars are positioned at less than a total surface are of the single crystal forming the stack. The stack fabrication is facilitated with a precision assembly system, where crystal parts are placed to desired locations on an assembly fixture for alignment following the preset operation steps. With the reduced clamping effect from bonding due to lower surface coverage of the discrete conductive pillars, such a piezoelectric d36 shear crystal stack exhibits a reduced driving voltage while maintaining a driving level and substantial and surprisingly improved performance.
Public/Granted literature
- US20170186937A1 SYSTEM AND FABRICATION METHOD OF PIEZOELECTRIC STACK THAT REDUCES DRIVING VOLTAGE AND CLAMPING EFFECT Public/Granted day:2017-06-29
Information query
IPC分类: