The various embodiments described herein include methods, devices, and systems for implementing logic gates. In one aspect, a circuit includes: (1) a superconducting component having a plurality of alternating narrow and wide portions; (2) a plurality of heat sources, each heat source of the plurality of heat sources coupled to a corresponding narrow portion of the plurality of alternating narrow and wide portions and configured to selectively provide heat to the corresponding narrow portion; (3) a bias current source coupled to each narrow portion of the plurality of alternating narrow and wide portions; and (4) an output node adapted to output a respective current while the plurality of superconducting components is in the non-superconducting state.