Invention Grant
- Patent Title: Memory arrays
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Application No.: US15641704Application Date: 2017-07-05
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Publication No.: US10374101B2Publication Date: 2019-08-06
- Inventor: Arup Bhattacharyya
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- Main IPC: H01L29/792
- IPC: H01L29/792 ; H01L27/1157 ; H01L21/28 ; H01L29/66 ; G11C17/12 ; G11C16/04 ; G11C16/16

Abstract:
In an example, a memory array may include a memory cell around at least a portion of a semiconductor. The memory cell may include a gate, a first dielectric stack to store a charge between a first portion of the gate and the semiconductor, and a second dielectric stack to store a charge between a second portion of the gate and the semiconductor, the second dielectric stack separate from the first dielectric stack.
Public/Granted literature
- US20190013415A1 MEMORY ARRAYS Public/Granted day:2019-01-10
Information query
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