Invention Grant
- Patent Title: Manufacturing method of semiconductor device
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Application No.: US15487761Application Date: 2017-04-14
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Publication No.: US10373971B2Publication Date: 2019-08-06
- Inventor: Hae Chan Park , Jang Won Kim , Gong Hyun Sa
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si, Gyeonggi-do
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si, Gyeonggi-do
- Agency: William Park & Associates Ltd.
- Priority: KR10-2016-0105752 20160819
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L21/02 ; H01L21/768 ; H01L21/762

Abstract:
A manufacturing method of a semiconductor device may be provided. The method may include forming stacks including interlayer insulating layers and separated by a slit, the interlayer insulating layers surrounding a channel layer and stacked to be spaced apart from one another with an interlayer space interposed therebetween. The method may include forming a conductive pattern filling the interlayer space. The method may include forming an isolation layer on a surface of the conductive pattern by oxidizing a portion of the conductive pattern by performing an oxidizing process.
Public/Granted literature
- US20180053779A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE Public/Granted day:2018-02-22
Information query
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