Invention Grant
- Patent Title: IC layout post-decomposition mask allocation optimization
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Application No.: US15662419Application Date: 2017-07-28
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Publication No.: US10372871B2Publication Date: 2019-08-06
- Inventor: Lynn Tao-Ning Wang , Sriram Madhavan
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Gibb & Riley, LLC
- Agent David A. Cain, Esq.
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
An IC design layout is decomposed into multiple masks to produce an initial output. A post-decomposition optimization is performed. The post-decomposition optimization includes identifying hotspots in the multiple masks, clustering features that contribute to the hotspots into clusters, identifying ones of the clusters that can be relocated to a different mask to eliminate the hotspot, without violating design rules, as reversible clusters, ranking movement of the reversible clusters by comparing the reversible clusters, as potentially moved, to known manufacturability metrics, and moving the reversible clusters to different masks according to the priority established by the ranking, to produce a post-decomposition optimized tape-out. The IC devices are manufactured by applying the post-decomposition optimized tape-out to manufacturing equipment.
Public/Granted literature
- US20190034577A1 IC LAYOUT POST-DECOMPOSITION MASK ALLOCATION OPTIMIZATION Public/Granted day:2019-01-31
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