Invention Grant
- Patent Title: Fetching instructions in an instruction fetch unit
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Application No.: US15624121Application Date: 2017-06-15
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Publication No.: US10372453B2Publication Date: 2019-08-06
- Inventor: Andrew David Webber , Daniel Ángel Chaver Martínez , Enrique Sedano Algarabel
- Applicant: MIPS Tech, LLC
- Applicant Address: US CA Campbell
- Assignee: MIPS Tech, LLC
- Current Assignee: MIPS Tech, LLC
- Current Assignee Address: US CA Campbell
- Agency: Adams Intellex, PLC
- Priority: GB1610541.3 20160616
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F9/38 ; G06F12/00

Abstract:
A method in an instruction fetch unit configured to initiate a fetch of an instruction bundle from a first memory and to initiate a fetch of an instruction bundle from a second memory, wherein a fetch from the second memory takes a predetermined fixed plurality of processor cycles, the method comprising: identifying that an instruction bundle is to be selected for fetching from the second memory in a predetermined future processor cycle; and initiating a fetch of the identified instruction bundle from the second memory a number of processor cycles prior to the predetermined future processor cycle based upon the predetermined fixed plurality of processor cycles taken to fetch from the second memory.
Public/Granted literature
- US20170364357A1 Fetching Instructions in an Instruction Fetch Unit Public/Granted day:2017-12-21
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