Invention Grant
- Patent Title: Tunable and integrated impedance matching and filter circuit
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Application No.: US15048744Application Date: 2016-02-19
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Publication No.: US10340876B2Publication Date: 2019-07-02
- Inventor: Chih-Chieh Cheng , Tero Tapio Ranta , Richard Bryon Whatley , Vikram Sekar
- Applicant: pSemi Corporation
- Applicant Address: US CA San Diego
- Assignee: pSemi Corporation
- Current Assignee: pSemi Corporation
- Current Assignee Address: US CA San Diego
- Agency: Jaquez Land Greenhaus LLP
- Agent John Land, Esq.
- Main IPC: H03H7/38
- IPC: H03H7/38 ; H03H7/01 ; H01L23/64 ; H01L21/70 ; H01F17/00

Abstract:
A high performance integrated tunable impedance matching network with coupled merged inductors. Embodiments include a combination of merged multiport constructively coupled spiral inductors and tunable capacitors configured to reduce insertion losses, circuit size, and optimization time while maintaining a high Q factor for the coupled spiral inductors. Some embodiments integrate one or more filter circuits with a tunable impedance matching network, useful in conjunction with such applications as radio frequency power amplifiers.
Public/Granted literature
- US20170026021A1 Tunable and Integrated Impedance Matching and Filter Circuit Public/Granted day:2017-01-26
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