Invention Grant
- Patent Title: Spacers for tight gate pitches in field effect transistors
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Application No.: US15938412Application Date: 2018-03-28
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Publication No.: US10340362B2Publication Date: 2019-07-02
- Inventor: Ruilong Xie , Chun-chen Yeh
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Thompson Hine LLP
- Agent Anthony Canale
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78

Abstract:
Structures for spacers of a field-effect transistor and methods for forming such spacers. A mask layer has a feature separated from a vertical sidewall of a first gate structure by a space of predetermined width that exposes a top surface of a semiconductor body. A spacer is formed adjacent to the vertical sidewall of the first gate structure. The spacer has a first section in the space and a second section. The first section of the spacer is located vertically between the second section of the spacer and the top surface of the semiconductor body. The first section of the spacer extends through the space to the top surface of the semiconductor body, and the first section of the spacer fully fills the space.
Public/Granted literature
- US20180219079A1 SPACERS FOR TIGHT GATE PITCHES IN FIELD EFFECT TRANSISTORS Public/Granted day:2018-08-02
Information query
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