Invention Grant
- Patent Title: Via patterning using multiple photo multiple etch
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Application No.: US16199847Application Date: 2018-11-26
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Publication No.: US10340178B2Publication Date: 2019-07-02
- Inventor: Jung-Hau Shiu , Chung-Chi Ko , Tze-Liang Lee , Wen-Kuo Hsieh , Yu-Yun Peng
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/311 ; H01L23/522 ; H01L23/532 ; H01L21/033

Abstract:
A method includes forming a dielectric layer, forming a photo resist over the dielectric layer, forming a first mask layer over the photo resist, and forming a second mask layer over the first mask layer. A first-photo-first-etching is performed to form a first via pattern in the second mask layer, wherein the first-photo-first-etching stops on a top surface of the first mask layer. A second-photo-second-etching is performed to form a second via pattern in the second mask layer, wherein the second-photo-second-etching stops on the top surface of the first mask layer. The first mask layer is etched using the second mask layer as an etching mask. The photo resist and the dielectric layer are etched to simultaneously transfer the first via pattern and the second via pattern into the dielectric layer.
Public/Granted literature
- US20190096752A1 Via Patterning Using Multiple Photo Multiple Etch Public/Granted day:2019-03-28
Information query
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