Invention Grant
- Patent Title: Method of forming dense hole patterns of semiconductor devices
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Application No.: US15695028Application Date: 2017-09-05
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Publication No.: US10340149B2Publication Date: 2019-07-02
- Inventor: Shing-Yih Shih , Jen-Jui Huang
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW New Taipei
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW New Taipei
- Agency: CKC & Partners Co., LLC
- Main IPC: H01L21/308
- IPC: H01L21/308

Abstract:
A method of forming dense hole patterns of semiconductor devices includes: forming a plurality of first pillars on at least one lower hard mask layer disposed on a substrate; forming a spacer layer on the lower hard mask layer to form a plurality of second pillars respectively covering the first pillars, wherein a plurality of first holes are formed among the second pillars; etching the spacer layer to expose first portions of the lower hard mask layer via the first holes and expose top surfaces of the first pillars; removing the first pillars to form a plurality of second holes in the spacer layer to expose second portions of the lower hard mask layer; etching the first portions and the second portions of the lower hard mask layer at least until portions of the substrate are exposed; and removing remaining portions of the spacer layer.
Public/Granted literature
- US20190074187A1 METHOD OF FORMING DENSE HOLE PATTERNS OF SEMICONDUCTOR DEVICES Public/Granted day:2019-03-07
Information query
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