Invention Grant
- Patent Title: Patterning method for semiconductor device and structures resulting therefrom
-
Application No.: US15641009Application Date: 2017-07-03
-
Publication No.: US10340141B2Publication Date: 2019-07-02
- Inventor: Tai-Yen Peng , Chao-Kuei Yeh , Ying-Hao Wu , Chih-Hao Chen
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/033
- IPC: H01L21/033 ; H01L21/311 ; H01L21/027 ; H01L21/768 ; H01L21/308 ; H01L21/28

Abstract:
An embodiment method includes defining a first mandrel and a second mandrel over a hard mask layer. The method also includes depositing a spacer layer over and along sidewalls of the first mandrel and the second mandrel, and forming a sacrificial material over the spacer layer between the first mandrel and the second mandrel. The sacrificial material includes an inorganic oxide. The method further includes removing first horizontal portions of the spacer layer to expose the first mandrel and the second mandrel. Remaining portions of the spacer layer provide spacers on sidewalls of the first mandrel and the second mandrel. The method further includes removing the first mandrel and the second mandrel and patterning the hard mask layer using the spacers and the sacrificial material as an etch mask.
Public/Granted literature
- US20180315601A1 Patterning Method for Semiconductor Device and Structures Resulting Therefrom Public/Granted day:2018-11-01
Information query
IPC分类: