Provided herein is a semiconductor memory device and a method for operating the same. The semiconductor memory device may include a memory cell array including a plurality of memory blocks, each including dummy cells coupled to dummy word lines and normal memory cells coupled to normal word lines, a peripheral circuit configured to perform an erase operation on a memory block selected from among the plurality of memory blocks and control logic configured to control the peripheral circuit, during the erase operation, to apply a pre-program voltage pulse to the dummy word lines and the normal word lines, and to control application of dummy word line voltages to the dummy word lines based on Erase-Write (EW) cycling information while applying an erase voltage to a common source line of the selected memory block, wherein the EW cycling information indicates a number of erase-write cycles of the selected memory block.