Invention Grant
- Patent Title: Resistance change memory
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Application No.: US15835988Application Date: 2017-12-08
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Publication No.: US10311929B2Publication Date: 2019-06-04
- Inventor: Hisanori Aikawa , Tatsuya Kishi , Keisuke Nakatsuka , Satoshi Inaba , Masaru Toko , Keiji Hosotani , Jae Yun Yi , Hong Ju Suh , Se Dong Kim
- Applicant: TOSHIBA MEMORY CORPORATION , SK HYNIX INC.
- Applicant Address: JP Tokyo KR Icheon-si, Gyeonggi-do
- Assignee: TOSHIBA MEMORY CORPORATION,SK HYNIX INC.
- Current Assignee: TOSHIBA MEMORY CORPORATION,SK HYNIX INC.
- Current Assignee Address: JP Tokyo KR Icheon-si, Gyeonggi-do
- Agency: Holtz, Holtz & Volek PC
- Main IPC: G11C11/16
- IPC: G11C11/16 ; G11C8/08 ; G11C8/12 ; G11C13/00 ; H01L43/08 ; H01L45/00 ; H01L27/22 ; H01L27/24 ; G11C5/06

Abstract:
According to an embodiment, a resistance change memory includes a semiconductor substrate, a transistor having a control terminal, a first terminal and a second terminal, the transistor provided on the semiconductor substrate, an insulating layer covering the transistor, a first conductive line connected to the first terminal and provided on the insulating layer, a second conductive line provided on the insulating layer, and a resistance change element connected between the second terminal and the second conductive line. The first conductive line has a width greater than a width of the second conductive line in a direction in which the first and second conductive lines are arranged.
Public/Granted literature
- US20180102156A1 RESISTANCE CHANGE MEMORY Public/Granted day:2018-04-12
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