- Patent Title: Semiconductor package including package substrate and chip stack in which a lower chip has a respective dummy pad by which each upper chip is connected to the package substrate
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Application No.: US15798655Application Date: 2017-10-31
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Publication No.: US10283486B2Publication Date: 2019-05-07
- Inventor: Jin-Young Jung
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine, Whitt & Francos, PLLC
- Priority: KR10-2016-0156055 20161122
- Main IPC: H01L23/34
- IPC: H01L23/34 ; H01L21/44 ; H01L25/065 ; H01L23/00 ; H01L25/00

Abstract:
A semiconductor package includes a package substrate, semiconductor chips stacked on the package substrate, and electrical connectors that connect internal circuitry of each of the chips to the package substrate. Each of the semiconductor chips includes a chip selection pad for transmitting a chip selection signal to the internal circuitry of the semiconductor chip and a chip dummy pad, electrically isolated from the internal circuitry, along a first side of the semiconductor chip. The electrical connectors include a lower chip connector that electrically connects the package substrate to the chip selection pad of the lower semiconductor chip, a first auxiliary connector that electrically connects the package substrate to the chip dummy pad of the lower semiconductor chip, and a second auxiliary connector that electrically connects the chip dummy pad of the lower semiconductor chip to the chip selection pad of the upper semiconductor chip.
Public/Granted literature
- US20180145053A1 SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2018-05-24
Information query
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