Invention Grant
- Patent Title: Method for forming semiconductor device structure having conductive structure with twin boundaries
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Application No.: US15672780Application Date: 2017-08-09
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Publication No.: US10283450B2Publication Date: 2019-05-07
- Inventor: Jian-Hong Lin , Chwei-Ching Chiu , Yung-Huei Lee , Chien-Neng Liao , Yu-Lun Chueh , Tsung-Cheng Chan , Chun-Lung Huang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/528 ; H01L23/532 ; H01L21/288 ; H01L21/768

Abstract:
A method, for forming a semiconductor device structure, includes: forming a conductive structure over a substrate, wherein the conductive structure includes twin boundaries. The forming the conductive structure includes: manipulating process conditions so as to promote formation of the twin boundaries and yet control a density of the twin boundaries to be outside a range for which a portion of a curve is an asymptote of a constant value, the curve representing values of an atomic migration ratio corresponding to values of the density of the twin boundaries.
Public/Granted literature
- US20170338178A1 METHOD FOR FORMING SEMICONDUCTOR DEVICE STRUCTURE HAVING CONDUCTIVE STRUCTURE WITH TWIN BOUNDARIES Public/Granted day:2017-11-23
Information query
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