Invention Grant
- Patent Title: Multiple metal layer semiconductor device and low temperature stacking method of fabricating the same
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Application No.: US15887142Application Date: 2018-02-02
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Publication No.: US10283448B2Publication Date: 2019-05-07
- Inventor: Ping-Yin Liu , Kai-Wen Cheng , Xin-Hua Huang , Lan-Lin Chao , Chia-Shiung Tsai , Xiaomeng Chen
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L21/768

Abstract:
A method of fabricating a semiconductor device includes providing a first substrate comprising a first conductive element exposed at a surface of the first substrate; forming a patterned photoresist layer atop the first conductive element, whereby the patterned photoresist layer provides openings exposing the first conductive element; forming a first metal layer in the openings and directly atop the first conductive element; forming a first insulator layer over the first metal layer and the first substrate; and polishing the first metal layer and the first insulator layer, resulting in a first interface surface over the first substrate wherein the first interface surface includes part of the first metal layer and the first insulator layer.
Public/Granted literature
- US20180226337A1 Multiple Metal Layer Semiconductor Device and Low Temperature Stacking Method of Fabricating the Same Public/Granted day:2018-08-09
Information query
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