Invention Grant
- Patent Title: Quasi-vertical diode with integrated ohmic contact base and related method thereof
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Application No.: US15507637Application Date: 2015-08-28
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Publication No.: US10283363B2Publication Date: 2019-05-07
- Inventor: Naser Alijabbari , Robert M. Weikle, II , Matthew Bauwens
- Applicant: UNIVERSITY OF VIRGINIA
- Applicant Address: US VA Charlottesville
- Assignee: UNIVERSITY OF VIRGINIA PATENT FOUNDATION
- Current Assignee: UNIVERSITY OF VIRGINIA PATENT FOUNDATION
- Current Assignee Address: US VA Charlottesville
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- International Application: PCT/US2015/047590 WO 20150828
- International Announcement: WO2016/033557 WO 20160303
- Main IPC: H01L29/47
- IPC: H01L29/47 ; H01L21/18 ; H01L29/872 ; H01L23/48 ; H01L29/66 ; H01L29/20

Abstract:
A quasi-vertical Schottky diode architecture includes a topside anode contact that connects to external circuitry through an airbridge finger, a thin mesa of semiconductor material with epilayers including a bottomside highly-doped layer, a bottomside ohmic contact directly below the anode, and a host substrate onto which the diode material is bonded by a thin adhesive layer. A method of fabricating the diode architecture includes preparation of the semiconductor wafer for processing (including initial etching to expose the highly-doped epilayer, deposition of metals and annealing to form the ohmic contact, application of the adhesive layer to the host substrate, thermal compression bonding of diode wafer and host wafer, with ohmic contact side facing host wafer to form a composite wafer, etching and formation of diode mesas to isolate devices on the host substrate, lithography and formation of topside anode contact and external circuitry on host wafer).
Public/Granted literature
- US20170250083A1 QUASI-VERTICAL DIODE WITH INTEGRATED OHMIC CONTACT BASE AND RELATED METHOD THEREOF Public/Granted day:2017-08-31
Information query
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