Invention Grant
- Patent Title: Laminated electronic component and laminated electronic component mounting structure
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Application No.: US15110508Application Date: 2015-01-16
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Publication No.: US10283271B2Publication Date: 2019-05-07
- Inventor: Michiaki Nishimura , Yasuhisa Shigenaga
- Applicant: KYOCERA Corporation
- Applicant Address: JP Kyoto-Shi, Kyoto
- Assignee: KYOCERA CORPORATION
- Current Assignee: KYOCERA CORPORATION
- Current Assignee Address: JP Kyoto-Shi, Kyoto
- Agency: Volpe and Koenig, P.C.
- Priority: JP2014-006849 20140117
- International Application: PCT/JP2015/051097 WO 20150116
- International Announcement: WO2015/108151 WO 20150723
- Main IPC: H01G4/30
- IPC: H01G4/30 ; H01G2/06 ; H01G4/12 ; H01G4/232 ; H05K1/18 ; H05K1/02

Abstract:
A laminated electronic component includes a main body including an effective layer in which dielectric layers and internal electrode layers are alternately laminated, and a pair of a first cover layer and a second cover layer which are disposed on opposite sides, respectively, in a stacking direction of the effective layer; and a plurality of external electrodes disposed on an outer surface of the main body. The internal electrode layers are alternately connected to the different external electrodes, and the first cover layer has a high-Young's modulus layer which is higher in Young's modulus than the dielectric layers. By mounting such a laminated electronic component to a substrate so that the first cover layer and a mounting face of the substrate are opposed to each other, it is possible to suppress acoustic noise.
Public/Granted literature
- US20160336114A1 LAMINATED ELECTRONIC COMPONENT AND LAMINATED ELECTRONIC COMPONENT MOUNTING STRUCTURE Public/Granted day:2016-11-17
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