Invention Grant
- Patent Title: Impedance tuning between packaging and dies
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Application No.: US16126826Application Date: 2018-09-10
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Publication No.: US10283200B2Publication Date: 2019-05-07
- Inventor: Nimrod Hermesh , Eliran Kanza
- Applicant: SanDisk Technologies LLC
- Applicant Address: US TX Addison
- Assignee: SanDisk Technologies LLC
- Current Assignee: SanDisk Technologies LLC
- Current Assignee Address: US TX Addison
- Agency: Dickinson Wright PLLC
- Main IPC: G11C13/00
- IPC: G11C13/00 ; H03H11/30 ; H01L25/065 ; G11C8/06 ; G11C7/00

Abstract:
An apparatus may include a controller configured to communicate with a plurality of dies via a signal path. The controller may notify the dies of its desire to communicate with a target die. In response, the dies may set on-die termination resistances of two or more of the dies to a low resistance value, which in turn may set an overall termination resistance of the memory dies to be lower than the low resistance value. The lower overall termination resistance may be closer to a characteristic impedance of a portion of the signal path comprising packaging components of a packaging of the dies compared to the low resistance value, thereby reducing impedance mismatch between the characteristic impedance of the packaging components and the termination resistance.
Public/Granted literature
- US20190043578A1 IMPEDANCE TUNING BETWEEN PACKAGING AND DIES Public/Granted day:2019-02-07
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