Invention Grant
- Patent Title: Semiconductor device and manufacturing method of semiconductor device
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Application No.: US15477130Application Date: 2017-04-03
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Publication No.: US10263296B2Publication Date: 2019-04-16
- Inventor: Kazutaka Suzuki , Takahiro Korenari
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Koutou-ku, Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Koutou-ku, Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2012-121503 20120529
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01M10/42 ; H01L29/66 ; H01L23/31 ; H01L21/8234 ; H01L27/02 ; H01L29/06 ; H01L29/417 ; H01L29/78
Abstract:
A semiconductor device capable of reducing an inter-source electrode resistance RSS (on) and reducing a chip size is provided. A semiconductor device according to the present invention includes a chip partitioned into three areas including a first area, a second area, and a third area, and a common drain electrode provided on a back surface of the chip, in which the second area is formed between the first and third areas, a first MOSFET is formed in the first area and the third area, and a second MOSFET is formed in the second area.
Public/Granted literature
- US20170207210A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE Public/Granted day:2017-07-20
Information query
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