Invention Grant
- Patent Title: Anti-fuse memory and semiconductor storage device
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Application No.: US15521768Application Date: 2015-10-09
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Publication No.: US10263002B2Publication Date: 2019-04-16
- Inventor: Yasuhiro Taniguchi , Hideo Kasai , Yasuhiko Kawashima , Ryotaro Sakurai , Yutaka Shinagawa , Kosuke Okuyama
- Applicant: Floadia Corporation
- Applicant Address: JP Tokyo
- Assignee: FLOADIA CORPORATION
- Current Assignee: FLOADIA CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Pearne & Gordon LLP
- Priority: JP2014-223793 20141031
- International Application: PCT/JP2015/078732 WO 20151009
- International Announcement: WO2016/067895 WO 20160506
- Main IPC: H01L27/112
- IPC: H01L27/112 ; H01L23/525 ; G11C17/16 ; G11C17/18 ; G11C17/06 ; H01L27/06 ; H01L27/108 ; H01L27/11502 ; H01L27/11585

Abstract:
In an anti-fuse memory includes a rectifier element of a semiconductor junction structure in which a voltage applied from a memory gate electrode to a word line is applied as a reverse bias in accordance with voltage values of the memory gate electrode and the word line, and does not use a conventional control circuit. Hence, the rectifier element blocks application of a voltage from the memory gate electrode to the word line. Therefore a conventional switch transistor that selectively applies a voltage to a memory capacitor and a conventional switch control circuit allowing the switch transistor to turn on or off are not necessary. Miniaturization of the anti-fuse memory and a semiconductor memory device are achieved correspondingly.
Public/Granted literature
- US20170250187A1 Anti-Fuse Memory And Semiconductor Storage Device Public/Granted day:2017-08-31
Information query
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