Invention Grant
- Patent Title: Semiconductor element having a warped surface and production method thereof
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Application No.: US15564301Application Date: 2016-04-01
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Publication No.: US10262960B2Publication Date: 2019-04-16
- Inventor: Masatoshi Sunamoto , Ryuji Ueno
- Applicant: MITSUBISHI ELECTRIC CORPORATION
- Applicant Address: JP Chiyoda-Ku, Tokyo
- Assignee: MITSUBISHI ELECTRIC CORPORATION
- Current Assignee: MITSUBISHI ELECTRIC CORPORATION
- Current Assignee Address: JP Chiyoda-Ku, Tokyo
- Agency: Buchanan Ingersoll & Rooney PC
- Priority: JP2015-077528 20150406
- International Application: PCT/JP2016/060937 WO 20160401
- International Announcement: WO2016/163319 WO 20161013
- Main IPC: H01L23/00
- IPC: H01L23/00 ; C23C18/36 ; C23C18/42 ; H01L21/288 ; C23C18/16 ; C23C18/32 ; C23C18/18 ; C23C18/54
Abstract:
In a semiconductor element of the present invention, an electroless nickel-phosphorus plating layer and an electroless gold plating layer are formed on both a front-side electrode and a back-side electrode of a front-back conduction-type substrate. The front-side electrode and the back-side electrode are formed of aluminum or an aluminum alloy. The proportion of the thickness of the electroless nickel-phosphorus plating layer formed on the front-side electrode with respect to the thickness of the electroless nickel-phosphorus plating layer formed on the back-side electrode is in a range of 1.0 to 3.5. The semiconductor element of the present invention allows the occurrence of voids inside solder during mounting by soldering to be prevented.
Public/Granted literature
- US20180138135A1 SEMICONDUCTOR ELEMENT AND PRODUCTION METHOD THEREOF Public/Granted day:2018-05-17
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