Invention Grant
- Patent Title: Method for manufacturing semiconductor device
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Application No.: US15430413Application Date: 2017-02-10
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Publication No.: US10262908B2Publication Date: 2019-04-16
- Inventor: Kaoru Mori
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Shapiro, Gabor and Rosenberger, PLLC
- Priority: JP2016-063384 20160328
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L29/66 ; H01L49/02 ; H01L21/266 ; H01L27/11582 ; H01L27/108 ; H01L21/265 ; H01L27/11

Abstract:
A method for manufacturing a semiconductor device includes the steps of: determining a first design dimension of a gate electrode of a selection MISFET, a second design dimension of a sidewall insulating film, and initial setting conditions for ion implantation for a high-concentration semiconductor region; forming the gate electrode; measuring a first processed dimension of the gate electrode; implanting ions to form a low-concentration semiconductor region at each end of the gate electrode; forming the sidewall insulating film over a sidewall of the gate electrode; measuring a second processed dimension of the sidewall insulating film; and implanting ions to form a high-concentration semiconductor region. In the former implantation step, execution conditions to the initial setting conditions are reset according to a deviation of the first processed dimension from the first design dimension and a deviation of the second processed dimension from the second design dimension, and the step is executed.
Public/Granted literature
- US20170278849A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2017-09-28
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