Invention Grant
- Patent Title: Integrated circuit calibration architecture
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Application No.: US16169903Application Date: 2018-10-24
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Publication No.: US10250339B2Publication Date: 2019-04-02
- Inventor: Vikas Sharma , Mark James O'Leary
- Applicant: pSemi Corporation
- Applicant Address: US CA San Diego
- Assignee: pSemi Corporation
- Current Assignee: pSemi Corporation
- Current Assignee Address: US CA San Diego
- Agency: Jaquez Land Greenhaus LLP
- Agent Martin J. Jaquez, Esq.; John Land, Esq.
- Main IPC: H04B17/10
- IPC: H04B17/10 ; H04W24/06 ; H04B17/14 ; H04B17/13 ; H04B17/19 ; H04B1/40

Abstract:
A calibration architecture that enables accurate calibration of radio frequency (RF) integrated circuits (ICs) chips used in transceiver RF systems in a relatively simple testing environment. Embodiments of the invention include one or more on-chip switchable internal calibration paths that enable direct coupling of a portion of the on-chip circuit to an RF test system while isolating other circuitry on the chip. Some embodiments allow interconnection of switchable internal calibration paths between separate IC chips. Still other embodiments utilize internal switches and antenna mutual coupling to provide over-the-air calibration, alone or in combination with direct signal coupling via internal calibration paths. Periodic self-calibration of an RF IC can be performed after initial factory calibration, so that adjustments in desired performance parameters can be made while such an IC is embedded within a final system, and/or to take into account component degradation due to age or other factors.
Public/Granted literature
- US20190068298A1 Integrated Circuit Calibration Architecture Public/Granted day:2019-02-28
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