Invention Grant
- Patent Title: Method for making a semiconductor device including a resonant tunneling diode structure having a superlattice
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Application No.: US15670240Application Date: 2017-08-07
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Publication No.: US10249745B2Publication Date: 2019-04-02
- Inventor: Robert J. Mears , Hideki Takeuchi , Marek Hytha
- Applicant: ATOMERA INCORPORATED
- Applicant Address: US CA Los Gatos
- Assignee: ATOMERA INCORPORATED
- Current Assignee: ATOMERA INCORPORATED
- Current Assignee Address: US CA Los Gatos
- Agency: Allen, Dyer, Doppelt + Gilchrist, P.A.
- Main IPC: H01L29/737
- IPC: H01L29/737 ; H01L29/10 ; H01L29/36 ; H01L29/66 ; H01L29/78 ; H01L27/092 ; H01L29/15 ; H01L29/161 ; H01L29/861 ; H01L29/88

Abstract:
A method for making a semiconductor device may include forming at least one double-barrier resonant tunneling diode (DBRTD) by forming a first doped semiconductor layer, and forming a first barrier layer on the first doped semiconductor layer and including a superlattice. The superlattice may include stacked groups of layers, each group of layers including stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include forming an intrinsic semiconductor layer on the first barrier layer, forming a second barrier layer on the intrinsic semiconductor layer, and forming a second doped semiconductor layer on the second superlattice layer.
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