An integrated circuit includes a stacked NPN having an upper NPN connected to a lower NPN. The upper NPN includes an upper collector, an upper base, and an upper emitter. The lower NPN includes a lower collector, a lower base, and a lower emitter. The upper collector includes collector segments on opposite sides of the lower emitter. The collector segments are laterally separated by collector separators which are aligned to orientation directions in the collector segments. The upper collector does not have collector separators across the orientation directions.