An integrated circuit (IC) device includes at least one standard cell. The at least one standard cell includes: first and second active regions respectively disposed on each of two sides of a dummy region, the first and second active regions having different conductivity types and extending in a first direction; first and second gate lines extending parallel to each other in a second direction perpendicular to the first direction across the first and second active regions, a first detour interconnection structure configured to electrically connect the first gate line with the second gate line; and a second detour interconnection structure configured to electrically connect the second gate line with the first gate line. The first and second detour interconnection structures include a lower interconnection layer extending in the first direction, an upper interconnection layer extending in the second direction, and a contact via.