Invention Grant
- Patent Title: Method of adjusting the parallelism of a fiber block with a chip surface
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Application No.: US15916495Application Date: 2018-03-09
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Publication No.: US10247890B2Publication Date: 2019-04-02
- Inventor: Philippe Grosse
- Applicant: Commissariat à l'Energie Atomique et aux Energies Alternatives
- Applicant Address: FR Paris
- Assignee: Commissariat à l'Energie Atomique et aux Energies Alternatives
- Current Assignee: Commissariat à l'Energie Atomique et aux Energies Alternatives
- Current Assignee Address: FR Paris
- Agency: Moreno IP Law LLC
- Priority: FR1751998 20170310
- Main IPC: G02B6/42
- IPC: G02B6/42 ; H01L21/66 ; G01B21/16 ; G01M11/00 ; G01L1/04

Abstract:
A method of adjusting the parallelism of a surface of a block of optical fibers with a surface of a semiconductor chip or wafer laid on an XY table, including the steps of: a) providing a sensor rigidly attached to the XY table and a handling arm supporting the block, said surface facing the XY table; b) for each of three non-aligned points of the surface of the block, displacing with respect to each other the XY table and the block in the X and/or Y directions to place the sensor opposite the point, and estimating, with the sensor, the distance along the Z direction between the point and the sensor; and c) modifying the orientation of the block by means of the handling arm to provide the desired parallelism.
Public/Granted literature
- US20180259727A1 METHOD OF ADJUSTING THE PARALLELISM OF A FIBER BLOCK WITH A CHIP SURFACE Public/Granted day:2018-09-13
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