Invention Grant
- Patent Title: Method of testing the resistance of a circuit to a side channel analysis
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Application No.: US15439530Application Date: 2017-02-22
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Publication No.: US10243729B2Publication Date: 2019-03-26
- Inventor: Hugues Thiebeauld De La Crouee
- Applicant: ESHARD
- Applicant Address: FR Martillac
- Assignee: ESHARD
- Current Assignee: ESHARD
- Current Assignee Address: FR Martillac
- Agency: Brake Hughes Bellerman LLP
- Priority: FR1651443 20160222; FR1651444 20160222; FR1651445 20160222
- Main IPC: G06F11/30
- IPC: G06F11/30 ; G06F12/14 ; H04L9/00 ; G01R31/317 ; G09C1/00 ; G06F21/72 ; H04L9/32 ; G06F21/75

Abstract:
In a general aspect, a test method can include acquiring a plurality of value sets, each including values of a physical quantity or of logic signals, linked to the activity of a circuit to be tested when executing distinct cryptographic operations applied to a same secret data, for each value set, counting occurrence numbers of the values of the set, for each operation and each of the possible values of a part of the secret data, computing a partial result of operation, computing sums of occurrence numbers, each sum being obtained by adding the occurrence numbers corresponding to the operations which when applied to a same possible value of the part of the secret data, provide a partial operation result having a same value, and analyzing the sums of occurrence numbers to determine the part of the secret data.
Public/Granted literature
- US20170244547A1 METHOD OF TESTING THE RESISTANCE OF A CIRCUIT TO A SIDE CHANNEL ANALYSIS Public/Granted day:2017-08-24
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