Invention Grant
- Patent Title: Input-output receiver
-
Application No.: US15436911Application Date: 2017-02-20
-
Publication No.: US10243564B2Publication Date: 2019-03-26
- Inventor: Shan Yue Mo , Jie Chen
- Applicant: Semiconductor Manufacturing International (Shanghai) Corporation , Semiconductor Manufacturing International (Beijing) Corporation
- Applicant Address: CN Shanghai CN Beijing
- Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION,SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
- Current Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION,SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
- Current Assignee Address: CN Shanghai CN Beijing
- Agency: Anova Law Group, PLLC
- Priority: CN201610134366 20160309
- Main IPC: H03K19/0175
- IPC: H03K19/0175 ; H03K19/0185 ; H03K3/3565 ; H03K19/003 ; H03K19/017

Abstract:
An input-output (I/O) receiver includes a receiving terminal, a first N-type metal-oxide-semiconductor (NMOS) transistor, a reformation circuit, and a compensation unit. The receiving terminal is coupled with an external voltage signal. The first NMOS transistor has a source electrode coupled with the receiving terminal and a gate electrode coupled with a first power supply voltage. The reformation circuit is configured to reform a voltage signal transmitted from a drain electrode of the first NMOS transistor. The compensation unit includes a first PMOS transistor, a second PMOS transistor, and a second NMOS transistor. Moreover, the compensation unit is configured to provide a compensation voltage to a voltage signal at the drain electrode of the first NMOS transistor thereby a maximum level of the voltage signal at the drain electrode of the first NMOS transistor reaches the first power supply voltage.
Public/Granted literature
- US20170264297A1 INPUT-OUTPUT RECEIVER Public/Granted day:2017-09-14
Information query
IPC分类: