Invention Grant
- Patent Title: Memory controller for a non-volatile memory, memory system and method
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Application No.: US15456994Application Date: 2017-03-13
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Publication No.: US10230401B2Publication Date: 2019-03-12
- Inventor: Daiki Watanabe , Daisuke Fujiwara , Kosuke Morinaga , Osamu Torii
- Applicant: TOSHIBA MEMORY CORPORATION
- Applicant Address: JP Minato-ku
- Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H03M13/29
- IPC: H03M13/29 ; G11C29/52 ; H03M13/00 ; G06F11/10 ; H03M13/15 ; G11C29/04

Abstract:
According to an embodiment, a memory controller for controlling a nonvolatile memory in which multi-dimensional error correction code having two or more component codes is stored, the memory controller configured to read out the multi-dimensional error correction code; acquire a received word of the multi-dimensional error correction code; hold an intermediate decoded word of the multi-dimensional error correction code; perform a first decoding process which is decoding a first component code included in the intermediate decoded word; when a first error symbol included in the first component code is detected by the first decoding process, perform a first rewriting process which is rewriting a value corresponding to the first error symbol in the intermediate decoded word, and record first recurrence information for reproducing a value of the first error symbol before rewriting; perform a second decoding process which is decoding a second component code included in the intermediate decoded word, of which dimension is different from that of the first component code; determine whether the first rewriting process is erroneous correction based on a result of the second decoding process; and when it is determined that the first rewriting process is erroneous correction, perform a counter process which is undoing the first rewriting process based on the recorded first recurrence information.
Public/Granted literature
- US20170187395A1 MEMORY CONTROLLER, MEMORY SYSTEM AND METHOD Public/Granted day:2017-06-29
Information query
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