Invention Grant
- Patent Title: Semiconductor device and method of manufacturing the same
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Application No.: US15914837Application Date: 2018-03-07
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Publication No.: US10229998B2Publication Date: 2019-03-12
- Inventor: Tatsuyoshi Mihara
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McGinn I. P. Law Group, PLLC.
- Priority: JP2017-098614 20170518
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L29/423 ; H01L29/51 ; H01L21/3105 ; H01L21/762 ; H01L21/28 ; H01L21/02 ; H01L27/11524

Abstract:
Variations in height of a top of an element isolation region, which is embedded in a trench surrounding the periphery of a fin having a channel region of a split-gate MONOS memory, are suppressed to improve reliability of a semiconductor device. An element isolation region embedded in a trench between a plurality of fins, which are part of a semiconductor substrate in a memory cell region and protrude above the semiconductor substrate, is comprised of an insulating film covering the bottom of the trench and a silicon nitride film covering the top of the insulating film.
Public/Granted literature
- US20180337281A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2018-11-22
Information query
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