Invention Grant
- Patent Title: Semiconductor package structure and semiconductor process
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Application No.: US15956704Application Date: 2018-04-18
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Publication No.: US10229894B2Publication Date: 2019-03-12
- Inventor: Shih-Ming Huang , Chun-Hung Lin , Yi-Ting Chen , Wen-Hsin Lin , Shih-Wei Chan , Yung-Hsing Chang
- Applicant: Advanced Semiconductor Engineering, Inc.
- Applicant Address: TW Kaohsiung
- Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee Address: TW Kaohsiung
- Agency: Foley & Lardner LLP
- Agent Cliff Z. Liu
- Priority: TW102121211A 20130614; TW102148836A 20131227
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L23/00 ; H01L23/29 ; H01L23/498 ; H01L21/56

Abstract:
A semiconductor process includes: applying an encapsulation material on an upper surface of a first substrate to encapsulate a die and first conductive parts, wherein the encapsulation material is a B-stage adhesive; forming a plurality of openings on the encapsulation material to expose the first conductive parts; pressing a second substrate onto the encapsulation material to adhere a lower surface of the second substrate to the encapsulation material, wherein the second substrate includes second conductive parts, and each of the first conductive parts contacts a corresponding one of the second conductive parts; and heating to fuse the first conductive parts and the corresponding second conductive parts to form a plurality of interconnection elements and solidify the encapsulation material to form a C-stage adhesive.
Public/Granted literature
- US20180240777A1 SEMICONDUCTOR PACKAGE STRUCTURE AND SEMICONDUCTOR PROCESS Public/Granted day:2018-08-23
Information query
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