Semiconductor chip and multi-chip package using thereof
Abstract:
The present disclosure provides a semiconductor chip having a non-through plug contour (buried alignment mark) for stacking alignment and a multi-chip semiconductor device employing thereof, and to a method for manufacturing same. In some embodiments, the semiconductor chip includes a semiconductor substrate having a first side and a second side, a conductive through plug extending through the semiconductor substrate from the first side to the second side, and a non-through plug extending from the first side to an internal plane of the semiconductor substrate without extending through the second side.
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