Invention Grant
- Patent Title: Stacked via structure for metal fuse applications
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Application No.: US15072400Application Date: 2016-03-17
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Publication No.: US10229875B2Publication Date: 2019-03-12
- Inventor: Griselda Bonilla , Kaushik Chanda , Ronald G. Filippi , Stephan Grunow , Naftali E. Lustig , Andrew H. Simon , Ping-Chuan Wang
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent L. Jeffrey Kelly
- Main IPC: H01L23/52
- IPC: H01L23/52 ; H01L23/522 ; H01L23/58 ; G01R31/02 ; G01R31/04 ; G01R31/07 ; G01R31/327 ; H01L23/525 ; H01L23/532

Abstract:
A back end of the line (BEOL) fuse structure having a stack of vias. The stacking of vias leads to high aspect ratios making liner and seed coverage inside the vias poorer. The weakness of the liner and seed layers leads to a higher probability of electromigration (EM) failure. The fuse structure addresses failures due to poor liner and seed coverage. Design features permit determining where failures occur, determining the extent of the damaged region after fuse programming and preventing further propagation of the damaged dielectric region.
Public/Granted literature
- US20160197039A1 STACKED VIA STRUCTURE FOR METAL FUSE APPLICATIONS Public/Granted day:2016-07-07
Information query
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