An infrastructure for servicing remote direct memory access (RDMA) requests without the need to pin memory and/or register memory for access by only a single RDMA adapter. Rather, RDMA requests can be coherently serviced from memory accessible to multiple adapters, and that memory can be flexibly managed (such as by swapping it out of main memory or moving it around within main memory). This coherent servicing of RDMA requests is achieved through the use of a coherent attached bus connecting the RDMA adapters to main memory that owns the address space.