Invention Grant
- Patent Title: Level shifter
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Application No.: US15851254Application Date: 2017-12-21
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Publication No.: US10200043B2Publication Date: 2019-02-05
- Inventor: Kazuhiro Koudate
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McGinn I.P. Law Group, PLLC
- Priority: JP2013-164319 20130807
- Main IPC: H03K19/0185
- IPC: H03K19/0185 ; H03K19/00 ; H03K3/356 ; H03K19/003 ; H03K19/0175

Abstract:
A level shifter including first and second MOS transistors placed in parallel between a first power supply voltage terminal and a reference voltage terminal, each transistor having a gate connected to a drain of the other transistor, third and fourth MOS transistors placed between the first and second MOS transistors and the reference voltage terminal and having gates respectively supplied with first and second control signals, and fifth and sixth MOS transistors placed between the third and fourth MOS transistors and the reference voltage terminal and having gates respectively supplied with third and fourth control signals, wherein the first to fourth control signals are used to control a conductive/nonconductive state between the first MOS transistor and the reference voltage terminal and a conductive/nonconductive state between the second MOS transistor and the reference voltage terminal.
Public/Granted literature
- US20180115314A1 LEVEL SHIFTER Public/Granted day:2018-04-26
Information query
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