Provided is an IO interface level shift circuit, comprising: an intermediate level generation circuit (11) and a level shift circuit (12). The intermediate level generation circuit is configured to provide an intermediate level Vdd_io of an IO interface. The level shift circuit is configured to convert an external logical signal into a signal in an internal power domain of a chip according to the intermediate level Vdd_io of the IO interface. Also provided are an IO interface level shift method and a storage medium. The interface level shift circuit enables level shift on an external IO signal at any level in a voltage withstanding domain of a device without adding a power domain suitable for an external IO level in the circuit.