Invention Grant
- Patent Title: Self-setting/resetting latch
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Application No.: US15240983Application Date: 2016-08-18
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Publication No.: US10200017B2Publication Date: 2019-02-05
- Inventor: Jeffrey P. Kotowski , Danut Manea
- Applicant: Atmel Corporation
- Applicant Address: US CA San Jose
- Assignee: Atmel Corporation
- Current Assignee: Atmel Corporation
- Current Assignee Address: US CA San Jose
- Agency: Fish & Richardson P.C.
- Main IPC: G11C7/10
- IPC: G11C7/10 ; H03K3/356

Abstract:
A self-setting/resetting latch circuit is disclosed that includes resistive loads for inverters used for setting and clearing the latch. In a first embodiment, the resistive loads cause the latch circuit to automatically set in response to a power supply voltage going low. In an alternate embodiment, the latch circuit is configured to be self-resetting or self-clearing when the power supply voltage goes low by reversing the set and clear terminals of the latch circuit and selecting a different node to be the output terminal of the latch circuit. The disclosed latch circuit is small and robust and draws zero power in the set state.
Public/Granted literature
- US20180054189A1 SELF-SETTING/RESETTING LATCH Public/Granted day:2018-02-22
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