Invention Grant
- Patent Title: Semiconductor device and method of manufacturing semiconductor device
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Application No.: US15665920Application Date: 2017-08-01
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Publication No.: US10199460B2Publication Date: 2019-02-05
- Inventor: Isamu Sugai , Takeyoshi Nishimura
- Applicant: FUJI ELECTRIC CO., LTD.
- Applicant Address: JP Kawasaki-Shi, Kanagawa
- Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP Kawasaki-Shi, Kanagawa
- Agency: Rabin & Berdo, P.C.
- Priority: JP2016-175316 20160908
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L21/265 ; H01L29/66 ; H01L29/78 ; H01L21/02 ; H01L29/36 ; H01L29/423

Abstract:
An n-type region and a p-type region of a first parallel pn layer are arranged parallel to a base front surface, in a striped planar layout extending from an active region over an edge termination region. In the n-type region, a gate trench extending linearly along a first direction is provided. In an intermediate region, in a surface region on the base front surface side of the first parallel pn layer, a second parallel pn layer is provided. The second parallel pn layer is arranged having a repetition cycle shifted along a second direction ½ a cell with respect to a repetition cycle of the n-type region and the p-type region of the first parallel pn layer. A gate trench termination portion terminates in the intermediate region between the active region and the edge termination region, and is covered by the p-type region of the second parallel pn layer.
Public/Granted literature
- US20180069115A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2018-03-08
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