Invention Grant
- Patent Title: Wafer bonding edge protection using double patterning with edge exposure
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Application No.: US15651990Application Date: 2017-07-17
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Publication No.: US10199352B2Publication Date: 2019-02-05
- Inventor: Joshua M. Rubin
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Michael J. Chang, LLC
- Agent Vazken Alexanian
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/00 ; H01L23/522 ; H01L23/532 ; H01L21/311 ; H01L25/00

Abstract:
Wafer bonding edge protection techniques are provided. In one aspect, a method of forming Cu interconnects in a wafer includes: forming a dielectric layer on the wafer; forming a first mask on the dielectric layer; patterning the first mask with a footprint/location of the Cu interconnects, wherein the patterning of the first mask is performed over an entire surface of the wafer; forming a second mask on the first mask, wherein the second mask covers a portion of the patterned first mask at an edge region of the wafer; patterning trenches in the dielectric layer through the first mask and the second mask, wherein the second mask blocks formation of the trenches at the edge region of the wafer and thereby provides edge protection during patterning of the trenches; and forming the Cu interconnects in the trenches. A wafer bonding method and interconnect structure are also provided.
Public/Granted literature
- US20170317052A1 Wafer Bonding Edge Protection Using Double Patterning With Edge Exposure Public/Granted day:2017-11-02
Information query
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