Invention Grant
- Patent Title: Vertical field effect transistor (FET) with controllable gate length
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Application No.: US15608159Application Date: 2017-05-30
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Publication No.: US10199278B2Publication Date: 2019-02-05
- Inventor: Kangguo Cheng , Xin Miao , Wenyu Xu , Chen Zhang
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Ryan, Mason & Lewis, LLP
- Agent Vazken Alexanian
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L29/78 ; H01L29/10

Abstract:
A method for manufacturing a semiconductor device includes forming a plurality of fins on a substrate, wherein a hardmask is formed on each of the plurality of fins, forming a gate structure around the plurality of fins, selectively depositing a dummy dielectric on the hardmask on each of the plurality of fins, depositing a dielectric layer on the gate structure and around the dummy dielectrics, selectively removing the dummy dielectrics and the hardmasks with respect to the dielectric layer and the gate structure to create a plurality of openings exposing portions of the gate structure, and selectively removing the exposed portions of the gate structure through the plurality of the openings.
Public/Granted literature
- US20180350695A1 VERTICAL FIELD EFFECT TRANSISTOR (FET) WITH CONTROLLABLE GATE LENGTH Public/Granted day:2018-12-06
Information query
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