Invention Grant
- Patent Title: Electrically conductive via(s) in a semiconductor substrate and associated production method
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Application No.: US15483538Application Date: 2017-04-10
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Publication No.: US10199274B2Publication Date: 2019-02-05
- Inventor: Roy Knechtel , Sophia Dempwolf , Daniela Guenther , Uwe Schwarz
- Applicant: X-FAB Semiconductor Foundries GmbH
- Applicant Address: DE Erfurt
- Assignee: X-FAB Semiconductor Foundries GmbH
- Current Assignee: X-FAB Semiconductor Foundries GmbH
- Current Assignee Address: DE Erfurt
- Agency: Stevens & Showalter, LLP
- Priority: DE102016106502 20160408
- Main IPC: H01L21/4763
- IPC: H01L21/4763 ; H01L21/768 ; H01L23/48 ; H01L23/00

Abstract:
A method is provided for producing at least one electrical via in a substrate, the method comprising: producing a protective layer over a component structure which has been produced or is present on a front side of the substrate; forming at least one contact hole which extends from a surface of a backside of the substrate to a contact surface of the component structure; forming a metal-containing and thus conductive lining in the at least one contact hole creating a hollow electrically conductive structure in the at least one contact hole; and applying a passivation layer over the backside of the substrate, the passivation layer spanning over the hollow electrically conductive structure for forming the at least one electrical via. Also provided is a micro-technical component comprising at least one electrical via.
Public/Granted literature
- US20170294351A1 ELECTRICAL CONDUCTIVE VIAS IN A SEMICONDUCTOR SUBSTRATE AND A CORRESPONDING MANUFACTURING METHOD Public/Granted day:2017-10-12
Information query
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