Invention Grant
- Patent Title: Semiconductor structure with improved punch-through and fabrication method thereof
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Application No.: US15726644Application Date: 2017-10-06
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Publication No.: US10177146B2Publication Date: 2019-01-08
- Inventor: Yong Li
- Applicant: Semiconductor Manufacturing International (Shanghai) Corporation , Semiconductor Manufacturing International (Beijing) Corporation
- Applicant Address: CN Shanghai CN Beijing
- Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION,SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
- Current Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION,SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
- Current Assignee Address: CN Shanghai CN Beijing
- Agency: Anova Law Group, PLLC
- Priority: CN201610885805 20161010
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L21/8238 ; H01L21/84 ; H01L27/092 ; H01L27/12 ; H01L29/66 ; H01L21/027 ; H01L21/311 ; H01L27/11

Abstract:
A semiconductor structure and a fabrication method are provided. A fabrication method includes providing a plurality of fins on a substrate including an NMOS region and a PMOS region adjacent to the NMOS region; forming an N-type well in the PMOS region and a P-type well in the NMOS region of the substrate; forming a protective sidewall to cover an upper portion of a sidewall surface of each fin in each of the NMOS region and PMOS region and to expose a lower portion of the sidewall surface of each fin; removing a partial width of the lower portion of the fin using the protective sidewall as an etch mask; removing the protective sidewall; and forming an isolation structure at least by oxidizing the remaining lower portion of the fin and having a top surface lower than the neighboring upper portions of the fins.
Public/Granted literature
- US20180102363A1 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF Public/Granted day:2018-04-12
Information query
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