Virtual machine purging of structures associated with address translation is delayed. A host logical processor executing on a physical processor issues a local purge request to purge entries of a structure associated with address translation. The structure associated with address translation includes one or more host entries for the host logical processor and one or more guest entries for a guest virtual processor running on the physical processor. Based on issuing the local purge request, an indicator is set to control purging of the one or more guest entries of the structure associated with address translation. Further, purging of the one or more guest entries of the guest virtual processor is delayed for consideration of purging at dispatch of the guest virtual processor.