- Patent Title: System and method for testing high-speed ADC in DP-QPSK receiver
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Application No.: US15703983Application Date: 2017-09-13
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Publication No.: US10171187B2Publication Date: 2019-01-01
- Inventor: Zhe Chen , Xiang Xiao , Long Zhao , Bao Li , Yuhua Cheng , Quanchuan Gao , Qiuwei Huang
- Applicant: Xiamen UX High-Speed IC Co., Ltd.
- Applicant Address: CN Xiamen, Fujian
- Assignee: XIAMEN UX HIGH-SPEED IC CO., LTD.
- Current Assignee: XIAMEN UX HIGH-SPEED IC CO., LTD.
- Current Assignee Address: CN Xiamen, Fujian
- Agent Leong C. Lei
- Priority: CN201710182465 20170324
- Main IPC: H04B17/29
- IPC: H04B17/29 ; H04L12/26 ; H04B10/61

Abstract:
A system and a method for testing a high-speed ADC in a DP-QPSK receiver are disclosed. The system includes a simulation module for outputting a data flow and performing signal recovery, an arbitrary waveform generator for receiving the data flow and outputting a high-speed analog signal and a clock signal, a high-speed ADC for converting the high-speed analog signal and the clock signal into a high-speed digital signal, a cache memory circuit for converting the high-speed digital signal into a low-speed digital signal, and a logic analyzer for sending the low-speed digital signal to the simulation module.
Public/Granted literature
- US20180278346A1 SYSTEM AND METHOD FOR TESTING HIGH-SPEED ADC IN DP-QPSK RECEIVER Public/Granted day:2018-09-27
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