Invention Grant
- Patent Title: RRAM cell bottom electrode formation
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Application No.: US15433353Application Date: 2017-02-15
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Publication No.: US10170699B2Publication Date: 2019-01-01
- Inventor: Trinh Hai Dang , Hsing-Lien Lin , Kai-Wen Cheng , Cheng-Yuan Tsai , Chia-Shiung Tsai , Ru-Liang Lee
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L27/24
- IPC: H01L27/24 ; H01L45/00

Abstract:
The present disclosure relates to a method of forming a resistive random access memory (RRAM) cell having a reduced leakage current, and an associated apparatus. In some embodiments, the method is performed by forming a bottom electrode layer over a lower metal interconnect layer. A dielectric data storage layer having a variable resistance is formed onto the bottom electrode layer in-situ with forming at least a part of the bottom electrode layer. A top electrode layer is formed over the dielectric data storage layer. By forming the dielectric data storage layer in-situ with forming at least a part of the bottom electrode layer, leakage current, leakage current distribution and device yield of the RRAM cell are improved.
Public/Granted literature
- US20170162787A1 RRAM CELL BOTTOM ELECTRODE FORMATION Public/Granted day:2017-06-08
Information query
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